noun
Reduced Instruction Set Computer; RISC
Technical computing term for a CPU design philosophy that uses a small, highly optimized set of instructions.
RISCアーキテクチャは、命令セットを簡素化することで高速化を図る。
RISC architecture aims to increase speed by simplifying the instruction set.
このプロセッサは縮小命令セットコンピュータの設計思想に基づいている。
This processor is based on the design philosophy of Reduced Instruction Set Computers.
CISC (Complex Instruction Set Computer) uses a larger, more complex instruction set, contrasting with RISC's simplified approach.
Loanword from English 'Reduced Instruction Set Computer', abbreviated as RISC. The Japanese term is a direct translation.