Translation guide
A CPU register that holds the memory address of the next instruction to be executed. In Japanese computing contexts, this is typically referred to by its English-derived name or a direct translation.
The hardware register that stores the address of the next instruction to fetch and execute.
Direct translation; widely understood in computer architecture contexts.
命令アドレスレジスタは、次に実行する命令のアドレスを保持する。
The instruction address register holds the address of the next instruction to be executed.
Commonly used synonym for instruction address register, especially in general CPU descriptions.
プログラムカウンタは命令アドレスレジスタとも呼ばれる。
The program counter is also called the instruction address register.
Abbreviation used in technical documentation; less common in spoken Japanese.
IARは命令アドレスレジスタの略称です。
IAR is an abbreviation for instruction address register.
In most Japanese computer science texts, 'プログラムカウンタ' (program counter) is used interchangeably with '命令アドレスレジスタ'. The English term 'instruction address register' is less common in Japanese than its abbreviation or the term 'program counter'.