noun
half adder
A digital circuit that adds two single binary digits and produces a sum and a carry output. Used in computer arithmetic logic units.
半加算機は、二進数の加算を行う基本的な回路です。
A half adder is a basic circuit that performs addition of binary numbers.
全加算機は、半加算機を組み合わせて作られます。
A full adder is made by combining half adders.
A full adder, which also takes a carry input, unlike a half adder.
Compound of 半 (half) + 加算 (addition) + 機 (device), a calque of English 'half adder'.