noun, noun or participle which takes 'suru'
logic synthesis
A semiconductor design technique where a high-level description of a circuit is automatically converted into a gate-level netlist. Used in electronic design automation (EDA).
このツールはRTLからゲートレベルへの論理合成を行います。
This tool performs logic synthesis from RTL to gate level.
論理合成の結
As a result of logic synthesis, a circuit that meets timing constraints was generated.