full subtracter
A digital logic circuit that performs subtraction of two bits while accounting for a borrow input. Used in computer arithmetic units.
A full subtracter, unlike a half subtracter, takes a borrow from the lower digit into account.
A half subtracter handles subtraction of two bits without a borrow input, while a full subtracter includes a borrow input for multi-bit subtraction.
Compound of 全 (full), 減算 (subtraction), and 器 (device). A technical term likely coined as a direct translation of the English 'full subtracter'.