分ぶん周しゅう回かい路ろ

noun

clock division circuit; frequency divider circuit

Technical term in electronics and computing; a circuit that reduces the frequency of an input clock signal by an integer factor.

• この分ぶん周しゅう回かい路ろは入にゅう力りょくクロックを四よん分ぶんの一いちに分ぶん周しゅうします。

  This clock division circuit divides the input clock by four.