noun
layout-design exploitation right
A legal right under Japanese semiconductor law, allowing the holder to commercially exploit a registered circuit layout design.
回路配置利用権は、半導体集積回路の回路配置に関する法律で保護される権利です。
The layout-design exploitation right is a right protected under the Act on the Circuit Layout of Semiconductor Integrated Circuits.
Compound of 回路配置 (circuit layout) + 利用 (exploitation) + 権 (right). A modern legal term coined under Japanese semiconductor legislation.